i-Chips IP00C813A

Dual Input/Output De-interlacer/Scaler with Warping LSI

The IP00C813A is an advanced i-Chips product that combines a de-interlacer and scaler into a single device, offering dual-input and dual-output capabilities. It includes a built-in video decoder, ARM9 CPU, LVDS output, and Ethernet/USB interfaces.

 

This versatile video device supports a wide range of input and output formats, including interlaced and progressive formats up to 1080P/WUXGA/2K1K, accommodating both SD and HD content. With its two independent de-interlacer/scaler blocks, featuring full 10-bit internal processing, the IP00C813A ensures exceptional image quality.

This versatile video device supports a wide range of input and output formats, including interlaced and progressive formats up to 1080P/WUXGA/2K1K, accommodating both SD and HD content. With its two independent de-interlacer/scaler blocks, featuring full 10-bit internal processing, the IP00C813A ensures exceptional image quality.

 

The IP00C813A can be configured in various ways to meet different application needs. In single-output mode, it enables Picture-in-Picture and Picture-by-Picture output. In dual-output mode, it generates separate outputs at any resolution. Notably, it excels at correcting geometry distortion through a user-programmable "warp table" stored in an external CPU or Flash memory. This enables precise adjustment of image shape and rotation, including 90-degree rotation and mirror image.

 

Additionally, the IP00C813A addresses color distortion with its powerful brightness and contrast adjustment system. This system is programmable for each 64x64 pixel region in the image, ensuring accurate color reproduction.

 

The video device's state-of-the-art edge blending function allows for seamless tiling of multiple images, making it ideal for applications such as video walls and large-scale projections. It ensures a smooth transition between blended images, creating a visually stunning and cohesive display.

 

With its comprehensive features, the IP00C813A caters to diverse requirements in the AV industry, including multimedia presentations, digital signage, video conferencing, and more. It eliminates the need for additional components, making it a cost-effective solution. 

i-Chips Technology Demo

Block Diagram

Specifications

Input

  • 30-bit RGB/30-bit YUV4:4:4/20-bit YUV4:2:2/10-bit YUV4:2:2@166MHz
  • 60-bit RGB/60-bit YUV4:4:4/40-bit YUV4:2:2@166MHz(Parallel)
  • Analog: CVBS/S-Video
  • 2176 pixels of active video

Output

  • 30-bit RGB/30-bit YUV4:4:4/20-bit YUV4:2:2@166MHz
  • Compatible with FPD link(2x2 only, no CMOS)@135MHz/each
  • 2176 pixels of active video

De-Interlacing

  • 3D/MPEG/mosquito/block noise reduction
  • 2:2, 2:3 and multi cadence detection
  • Chroma bug canceller

Scaling

  • 6symbol filter (horizontal only-8symbol) with FIR filter
  • Independent H and V scaling ratios (aspect ratio correction)
  • Coefficient filter ROM embedded (64set)
  • 90-degree image rotation (image and OSD)
  • Vertical keystone correction

Video Decoder

  • NTSC-M, JPN, 4.43 PAL-B, D, G, H, I, CombinationN, 60, &SECAM
  • VBI(Closed caption/CGMS/WSS)data extraction
  • Clamp Pulse output, raw data output

PiP & PoP Functions

  • Two(2) fully independent video inputs
  • Frame rate conversion with frame tear protection

Bitmap OSD

  • 256 colors/High color OSD (RGB565) compatible
  • Embedded font engine(65536 words)
  • Support for blinking and semi-transparent (4 color) OSD

Embedded CPU

  • ARM926EJ-S core with 16KB instruction, 16KB data
  • Work RAM(64KB)
  • Ethernet, USB2.0(host, function)
  • DMAC(2ch)/UART(4ch)/I2C(master/slave)
  • Timer(4ch)/Interruption control/IR remote control/RTC
  • 10-bit ADC(8ch)/10-bit DAC(6ch)

Warping

  • Coordinated look-up table
  • Correction up to a 25-degree angle both horizontal and vertical
  • Rotation angle up to 25 degrees
  • Edge-blending

External CPU Interface

  • 8-bit parallel, 4-line serial (with external CPU)
  • External connection to Flash/SRAM/SDRAM
  • Address:23-bit/Data:16-bit
  • External interruption input (4 line)

Image Quality Control

  • 12-bit gamma correction with interpolation (up to 7 LUTs available)
  • 12-bit color gamma correction table x2(2, 7, or 31set)x2
  • H and V edge enhancement function (9 symbols)
  • Bias x3, Gain x2, CSC equipped for RGB <-> YUV
  • Color management function
  • Fully compatible with xvYCC
  • Uniformity correction
  • Input image detection of APL, Histogram, Min/Max, edge strength/position measurement, etc.

External Memory

  • Memory-bus 64-bit 800MHz
  • DDR3-SDRAM PC800(1G/512M/bit x16)x4

Power Supply

  • 3.3V, 1.5V and 1.2V
  • Separate power consumption (Scaler and CPU)

Package

  • 900-pin BGA, 35mmx35mm (1mm pitch)