Altera® Stratix® 10 MX SoC FPGA
The Altera® Stratix 10 MX FPGA is a versatile accelerator that plays a critical role in high-performance computing (HPC), data centers, virtual networking functions (NFV), and broadcast applications. These FPGA accelerators are uniquely designed by combining the programmability and flexibility of Altera® Stratix® 10 FPGA and SoC FPGA with 3D stacked high-bandwidth memory 2 (HBM2). The innovative Altera® Hyperflex™ FPGA Architecture empowers the core fabric with exceptional performance and enables efficient utilization of bandwidth from the in-package memory tile. Moreover, the DRAM memory tile is physically connected to the FPGA using Altera’s Embedded Multi-Die Interconnect Bridge (EMIB) technology.
Product Name | Logic Elements (LE) | Digital Signal Processing (DSP) Blocks | Maximum Embedded Memory | Maximum User I/O Count' | Package Options | |
Altera® Stratix® 10 MX 2100 FPGA | 2073000 | 3960 | 239.5 Mb | 656 | F2597, F2912 | |
Altera® Stratix® 10 MX 1650 FPGA | 1679000 | 3326 | 223.5 Mb | 656 | F2597, F2912 |