Altera Agilex 5 FPGA and SoC Overview

Altera Agilex 5 devices serve a broad range of applications that require high performance, lower power, and smaller form factors. This tier consists of the performance-optimized D-Series FPGAs and the power-optimized E-Series FPGAs. Altera Agilex 5 devices also feature the industry’s first Enhanced DSP with AI Tensor Block, which deliver high-efficiency AI and digital signal processing (DSP) functionality, and the FPGA industry’s first asymmetric applications processor system consisting of dual Arm Cortex-A76 cores and dual Cortex-A55 cores, which enable you to optimize the performance and power efficiency of their workloads. These characteristics make them ideal for midrange FPGA applications across the edge and core including wireless and wireline communications, video and broadcast equipment, industrial applications, test and measurement products, medical electronics, and defense applications.

E-Series FPGAs and SoCsD-Series FPGAs and SoCs


 

E-Series FPGAs and SoCs are optimized for power and size— with 50% lower power while delivering up to 2.5X better performance as compared to Cyclone V devices, also with features including transceiver rates up to 24x28 Gbps, PCIe 4.0x4, 6x25GbE, 3,600 Mbps DDR5, dual core of A55 and dual core of A76 make it ideal for intelligent applications at the edge, embedded, and more.D-Series FPGAs and SoCs are optimized for performance and power efficiency— with 42% lower power while delivering up to 1.5X better performance as compared to Intel Stratix 10 FPGAs, also with features including transceiver rates up to 32x28 Gbps, PCIe 4.0x8, 16x25GbE, 4,000 Mbps DDR5, dual core of A55 and dual core of A76 make it deal for various applications across multiple markets

Altera Agilex® 5 FPGAs and SoCs E-Series Product Table - Device Group A

PRODUCT LINE

A5E 013A

A5E 028A

A5E 043A

A5E 052A

A5E 065A

ResourcesLogic elements (LEs)138,060282,256434,240523,920656,080
Adaptive logic modules (ALMs)46,80095,680147,200177,600222,400
ALM registers68,40093,600588,800710,400889,600
M20K memory blocks3587161,0501,2881,611
M20K memory size (Mb)6.9913.9820.5125.1631.46
MLAB memory count2,3404,7846,7208,44011,120
MLAB memory size (Mb)1.01.82.42.84.3
I/O PLL44888
Variable-precision digital signal processing (DSP) blocks188376564676846
18 x 19 multipliers3767521,1281,352130
Peak INT8 (TOPS)5.7811.5517.3320.7825.99
Maximum Available Device ResourcesLVDS pairs at 1.6 Gbps9696192192192
DDR4/5 and LPDDR4/5 interfaces (x32)22444
MIPI D-PHY interface1414282828
Differential (RX or TX) pairs at 28 Gbps412162424
PCIe 4.0 x4 instance13466
High-speed I/O (HSIO)192192384384384
High-voltage I/O (HVIO)200200120120120
 Secure device manager (SDM)Provides SHA-384 bitstream integrity, ECDSA 256/384 bitstream authentication, AES-256 bitstream encryption, physically unclonable function (PUF) protected key storage, side-channel attack resistance, SPDM attestation, cryptographic services, physical anti-tamper support
 Hard processor systemMulti-core with 32-bit/64-bit dual-core Arm Cortex-A55 up to 1.5 GHz with 32 KB I/D cache and 128 KB L2 cache, and dual-core Arm Cortex-A76 up to 1.8 GHz with 64 KB I/D cache and 256 KB L2 cache, and up to 2 MB L3 shared cache, multi-channels direct memory access (DMA), 512 KB on-chip RAM, USB 3.1 x1, USB 2.0 OTG x2, TSN MAC x3, UART x2, SPI M x2, SPI S x2, I3C x2, I2C x5, NAND x1, SDMMC x1, Osc timer x2, SP timer x2, watchdog x5, GPIO x2.
 TransceiverPCI Express (PCIe) hard IP up to PCIe 4.0 x4 EP and RP Transceiver channel count: up to 24 channels at 28 Gbps (NRZ) Ethernet IP: up to 6 x10/25 GbE hard IP (MAC, PCS, and FEC)
Package Options3 and I/O Pins4: General-Purpose I/O (GPIO) Count, High-Voltage I/O Count, LVDS Pairs5, and Transceiver Count
 B23A120/96/4120/96/12120/96/12120/96/12120/96/12
 B32A200/192/4200/192/12120/384/16120/384/24120/384/24

Altera Agilex® 5 FPGAs and SoCs E-Series Product Table - Device Group B

PRODUCT LINE

A5E 005B

A5E 007B

A5E 008B

A5E 013B

A5E 028B

A5E 043BA5E052BAA5E065B
ResourcesLogic elements (LEs)50,44569,03085,196138,060282,256434,240523,920656,080
Adaptive logic modules (ALMs)17,10023,40028,88046,80095,680147,200177,600222,400
ALM registers68,40093,600115,520187,200382,720588,800710,400889,600
M20K memory blocks1301792293587161,0501,2881,611
M20K memory size (Mb)2.543.504.476.9913.9820.5125.1631.46
MLAB memory count8501,1701,7802,3404,7846,7208,44011,120
MLAB memory size (Mb)0.520.711.091.432.924.105.136.79
I/O PLL22444888
Variable-precision digital signal processing (DSP) blocks6594116188376564676846
18 x 19 multipliers1301882323767521,1281,3521,692
Peak INT8 (TOPS)1.72.463.054.939.8514.7817.7222.17
Maximum Available Device ResourcesLVDS pairs at 1.6 Gbps4848969696192192192
DDR4/5 and LPDDR4/5 interfaces (x32)11222444
MIPI D-PHY interface77141414282828
Differential (RX or TX) pairs at 28 Gbps004412162424
PCIe 4.0 x4 instance00113466
High-speed I/O (HSIO)9696192192192384384384
High-voltage I/O (HVIO)160160200200200120120120
 Secure device manager (SDM)Provides SHA-384 bitstream integrity, ECDSA 256/384 bitstream authentication, AES-256 bitstream encryption, physically unclonable function (PUF) protected key storage, side-channel attack resistance, SPDM attestation, cryptographic services, physical anti-tamper support
 Hard processor systemMulti-core with 32-bit/64-bit dual-core Arm Cortex-A55 up to 1.5 GHz with 32 KB I/D cache and 128 KB L2 cache, and dual-core Arm Cortex-A76 up to 1.8 GHz with 64 KB I/D cache and 256 KB L2 cache, and up to 2 MB L3 shared cache, multi-channels direct memory access (DMA), 512 KB on-chip RAM, USB 3.1 x1, USB 2.0 OTG x2, TSN MAC x3, UART x2, SPI M x2, SPI S x2, I3C x2, I2C x5, NAND x1, SDMMC x1, Osc timer x2, SP timer x2, watchdog x5, GPIO x2.
 TransceiverPCI Express (PCIe) hard IP up to PCIe 4.0 x4 EP and RP Transceiver channel count: up to 24 channels at 28 Gbps (NRZ) Ethernet IP: up to 6 x10/25 GbE hard IP (MAC, PCS, and FEC)
Package Options3 and I/O Pins4: General-Purpose I/O (GPIO) Count, High-Voltage I/O Count, LVDS Pairs5, and Transceiver Count   
 B15A80/6280/62      
 M16A  40/192/440/192/440/192/8   
 B18A160/52160/52      
 B23B160/96160/96160/192160/192160/192   
 B23A  120/96/4120/96/4120/96/12120/96/12120/96/12120/96/12
 B32A(  200/192/4200/192/4200/192/12120/384/16120/384/120/384/24

Altera Agilex® 5 FPGAs and SoCs D-Series Product Table

PRODUCT LINE

A5D 010

A5D 025

A5D 031

A5D 051

A5D 064

ResourcesLogic elements (LEs)103,250254,054318,600515,070644,280
Adaptive logic modules (ALMs)35,00086,120108,000174,600218,400
ALM registers140,000344,480432,000698,400873,600
M20K memory blocks5341,2811,6022,5633,204
M20K memory size (Mb)10.4325.0231.2950.0662.58
MLAB memory count178034205,4008,44010,920
MLAB memory size (Mb)1.092.093.305.156.67
I/O PLL88888
Variable-precision digital signal processing (DSP) blocks2767369201,4721,840
18 x 19 multipliers5521,4721,8402,9443,680
Peak INT8 (TOPS)8.4822.6128.2645.2256.22
Maximum Available Device ResourcesLVDS pairs at 1.6 Gbps192192192192192
DDR4/5 and LPDDR4/5 interfaces (x32)22222
MIPI D-PHY interface2828282828
Differential (RX or TX) pairs at 28 Gbps1616162432
PCIe 4.0 x4 instance44468
High-speed I/O (HSIO)384384384384384
High-voltage I/O (HVIO)6060606060
 Secure device manager (SDM)Provides SHA-384 bitstream integrity, ECDSA 256/384 bitstream authentication, AES-256 bitstream encryption, physically unclonable function (PUF) protected key storage, side-channel attack resistance, SPDM attestation, cryptographic services, physical anti-tamper support
 Hard processor systemMulti-core with 32-bit/64-bit dual-core Arm Cortex-A55 up to 1.5 GHz with 32 KB I/D cache and 128 KB L2 cache, and dual-core Arm Cortex-A76 up to 1.8 GHz with 64 KB I/D cache and 256 KB L2 cache, and up to 2 MB L3 shared cache, multi-channels direct memory access (DMA), 512 KB on-chip RAM, USB 3.1 x1, USB 2.0 OTG x2, TSN MAC x3, UART x2, SPI M x2, SPI S x2, I3C x2, I2C x5, NAND x1, SDMMC x1, Osc timer x2, SP timer x2, watchdog x5, GPIO x2.
 TransceiverPCI Express (PCIe) hard IP up to PCIe 4.0 x4 EP and RP Transceiver channel count: up to 24 channels at 28 Gbps (NRZ) Ethernet IP: up to 6 x10/25 GbE hard IP (MAC, PCS, and FEC)
Package Options3 and I/O Pins4: General-Purpose I/O (GPIO) Count, High-Voltage I/O Count, LVDS Pairs5, and Transceiver Count
 B23A60/192/860/192/860/192/8  
 B32A60/384/1660/384/1660/384/1660/384/2460/384/32

Altera Agilex® 5 FPGA Focus Markets

Image Sensor Processing

Inline image processing

  • Pixel defect correction
  • Vignette correction
  • Adaptive noise reduction

Customized Connectivity

  • High-definition multimedia interface (HDMI)
  • MIPI D-PHY

Hard Processor System

  • Flexible embedded software stack
  • Graphical user interface

Autonomous Mobile Robots

Flexible I/O

  • MIPI
  • HDMI
  • Time-Sensitive Networking (TSN)
  • LVDS

FPGA Acceleration

  • Sensor fusion
  • Point of cloud processing

Hard Processor System

  • RTOS
  • Hypervisor functions
  • Network features
  • User application

Clinical System

Power Optimized

  • Low-density option
  • Battery-powered clinical equipment

FPGA Acceleration

  • Custom image progressing
  • AR/VR innovations
  • Deterministic low latency

Hard Processor System

  • Real-time waveform analysis
  • Graphic controls for Human-Machine Interaction (HMI)