What is SLVS-EC?

Sony SLVS-EC: You know when you need it!

Sony’s SLVS-EC Camera Interface (Scalable Low Voltage Signaling with Embedded Clock) has quickly established itself as the future of CMOS Sensor Interfacing replacing SLVS and subLVDS as the interface of choice for high-end designs. Many Sony sensors support SLVS-EC exclusively and even other sensor suppliers are starting to adopt this interface as standard.

  SLVSSubLVDS
Effective Data RateBaud Grade594 Mbps594 Mbps
1   1.152 to 1.25 Gbps
2   2.304 to 2.5 Gbps 
3   4.608 to 5.0 Gbps 
Line Coding8b10bNoneNone
Lane Configuration8 Lanes8 Lanes + 1 Clock8 Lanes + 1 Clock
Clocking MethodEmbedded ClockDDR Source-Synchronous ClockDDR Source-Synchronous Clock
Differential Signal Level200mV200mV (160mV min)150mV (100mV min)
Common Signal Level200mV200mV900mV
Line Termination (TX)2 x 50 Ω Single-end2 x 50 Ω Single-endNone
Line Termination (RX)100 Ω Differential100 Ω Differential100 Ω Differential
Skew TuningDo Not CareDat /Clock Skew TuningDat /Clock Skew Tuning
Supply Voltage1.2V1.2V1.8V
Data FormatByte PacketPixel PacketPixel Packet
H/V SyncSAV/EAVSAV/EAVSAV/EAV

Don’t try and re-invent the wheel!

Macnica Mpression has cost-effective, hardware-verified, FPGA-IP for SLVS-EC supporting multiple FPGA suppliers (Intel-PSG preferred, Xilinx option available).

Don’t yoke yourself to an inferior IP partner!

Macnica was first to market with FPGA IP for SLVS-EC v1.2 and first to support SLVS-EC v2.0.   Hardware evaluation with Sony IMX420, IMX421, and IMX530 available (EasyMVC).  Full details, pricing, documentation, simulation environment, and more under NDA.

EasyMVC

Machine Vision Camera Evaluation/Development Environment available with Sony Sensor Board